The present invention relates generally to a method and apparatus for synchronizing respective phases of high definition television signal components. The present invention is applicable to an encoder which encodes the high definition television signal.
The high definition television (abbreviated HDTV hereinafter) signal consists of a combination of red (R), green (G) and blue (B) signal components (referred to as a RGB signal hereinafter) or one luminance signal (Y) and two color-difference signal (P.sub.R and P.sub.B) components (referred to as a YP.sub.R P.sub.B signal hereinafter). Each signal component of the RGB signal has a bandwidth of 30 MHz. On the other hand, in the YP.sub.R P.sub.B signal, combinations of the Y signal with 20 MHz and each of the P.sub.R and P.sub.B signals with 7 MHz and the Y signal with 30 MHz and each of the P.sub.R and P.sub.B signals with 15 MHz are known. The RGB signal or the YP.sub.R P.sub.B signal is encoded at a basic rate of 1.2 Gbit/s by means of a pulse code modulation (PCM) encoding method, an interframe encoding method, or the like.
The respective signal components of the RGB signal or the YP.sub.R P.sub.B signal are individually transmitted via different coaxial cables. Therefore, each phase of each of the three signal components must be successfully synchronized with one another, otherwise the image quality will be lowered so that, for instance, a picture includes a blurred edge. Accordingly, many restrictions are imposed on a conventional HDTV system design to synchronize respective phases of the HDTV signal components. For example, interfaces are standardized and coaxial cables each having the same length are used. In the more concrete conventional HDTV system shown in FIG. 1 comprising a video tape recorder (VTR) 41, an encoder 47 and an optical transmission line 48, respective interfaces used for the VTR 41 and the encoder 47 are standardized and each coaxial cable therebetween has the same length. The encoder 47 comprises analog to digital (A/D) converters 42-1 to 42-3, a horizontal synchronizing signal detecting circuit 43, a phase locked loop (PLL) circuit 44, a processor 45 and an electric to optical converter (referred to as OS hereinafter) 46. Each HDTV signal component is transmitted from the VTR 41 to the encoder 47 via a corresponding coaxial cable connected to a corresponding one of the A/D converters 42-1 to 42-3. The synchronizing signal detecting circuit 43 is coupled to one of the coaxial cable and the PLL circuit 44. The PLL circuit 44 is further connected to respective A/D converters 42-1 to 42-3. The A/D converters 42-1 to 42-3 are respectively connected to the processor 45, and the processor 45 is connected to the OS 46. The horizontal synchronizing signal detecting circuit 43 detects a horizontal synchronizing signal of one of the signal components, for example, the Y signal.
In operation, each signal component of the YP.sub.R P.sub.B signal is first input from the VTR 41 to the corresponding A/D converter via the corresponding coaxial cable. On the other hand, the Y signal is input to the horizontal synchronizing signal detecting circuit 43, so that the horizontal synchronizing signal thereof is detected. Next, the PLL circuit 44 divides and synchronizes its clock with the detected horizontal synchronizing signal. Then the clock is output to respective A/D converters 42-1 to 42-3 so as to be used for the sampling of each signal component. Thus, each analog signal component is converted into a digital signal component and input into the processor 45. Then the processor 45 encodes each digital signal component and outputs it to the OS 46. Lastly, the OS 46 converts the HDTV signal into the optical signal and transmits it via an optical transmission line 48.
However, the above conventional HDTV system has the following disadvantage in that too many restrictions are imposed on the system design thereof.